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SILICOMOTIVE TRACK OF RECORD
Our results-oriented team is composed of experienced IC design, verification and software engineers. This team has a long and valuable record of achievements in helping organizations achieve competitive advantages by focusing on time-to-market effectiveness and design quality. In the past, the members of our team worked for leading edge semiconductor design houses including Conexant Systems, Mindspeed Technologies, PMC-Sierra, ATI Technologies, S-MOS Systems, Epson Research and Development, and Alcatel. We also have been engaged with smaller, startup companies such as: Vector12, Cogent Chipware, Gazelle, and Westbay Semiconductor acquired by Intel. There are two main areas of expertise Silicomotive team is proud of: IP development and chip integration as well as design methodology services and support.
Intelectual Property Development and Chip Integration
By utilizing various design entry methods including VHDL, Verilog and schematic entry as well as tools from Cadence, Mentor Graphics, Synopsys, Verisity, Verplex, etc. we have completed numerous multi million gate designs in the areas of optical and wire based networking and graphics display and acceleration applications. Our team with experience in designing complex SoC. ASSP, ASIC and FPGA devices has successfully completed designs in the following areas:
 | Optical and Wire-Based Networking |
| |  | SONET/SDH Components |
| | | DS3/E3 Components |
| | | T1/E1 Components |
| | | ATM Components |
| | | DSLAM Components |
| | | Packet Processing Components |
| | | Embedded Processors |
| Graphics Display and Acceleration |
| | | Display Engines |
| | | Common PC Bus Interfaces |
| | | Low Power LCD Display Controllers |
| | | Video Multimedia Interfaces |
Design Services and Design Support
Additional achievements in the area of Design Flow development and support include:
| Design For Test |
| | | DFT Flow Development |
| | | Memory BIST |
| | | Internal and Boundary Scan Implementation |
| | | ATPG and Test Pattern Re-Simulation |
| | | DFT Reuse Strategy Development |
| | | IDDq Test Development |
| | | DFT Rules Definition |
| | | Fault Simulation Flow Development |
| Design Services and CAD Support |
| | | Design Flow Development, Support and Training |
| | | Evaluation of CAD tools |
| | | Design Reuse Infrastructure Development and Support |
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